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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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MCM101525
2M x 2 Bit Fast Static Random Access Memory with ECL I/O
The MCM101525 is a 4,194,304 bit static random access memory organized as 2,097,152 words of 2 bits. This device features complementary outputs. This circuit is fabricated using high performance silicon-gate BiCMOS technology. Asynchronous design eliminates the need for external clocks or timing strobes. The MCM101525 is available in a 400 mil, 36 lead TAB. * Fast Access Times: 12, 15 ns * Equal Address and Chip Select Access Time * Power Operation: - 195 mA Maximum, Active AC BLOCK DIAGRAM
A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 D0 INPUT DATA CONTROL COLUMN I/O COLUMN DECODER ROW DECODER MEMORY MATRIX 1024 ROWS x 4096 COLUMNS VEE VCC TB PACKAGE 400 MIL TAB CASE 984A-01
PIN ASSIGNMENT
A10 A11 A12 A13 A14 S D0 Q0 VCC VEE Q0 VEE W A0 A15 A16 A17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 A1 A2 A3 A8 A19 NC A20 Q1 VEE VCC Q1 D1 NC A9 A4 A5 A6 A7
D1 Q0 Q0 Q1 Q1 S W
A20 A19 A18 A7 A6
A5 A4
A3 A2 A1
A0
A18 Q0 Q0 Q1 Q1
PIN NAMES
A0 - A20 . . . . . . . . . . . . . Address Inputs S . . . . . . . . . . . . . . . . . . . . . . . Chip Select Q0 - Q1 . . . . . . . . . . . . . . . . Data Output NC . . . . . . . . . . . . . . . . . . No Connection VCC . . . . . . . . . . . . . . . . . . . . . . . . Ground W . . . . . . . . . . . . . . . . . . . . . Write Enable D0 - D1 . . . . . . . . . . . . . . . . . . Data Input Q0 and Q1 . . Complementary Data Out VEE . . . . . . . . . . . . . . . . . . Power Supply
This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
(c) Motorola, Inc. 1994 MOTOROLA FAST SRAM
8/94
MCM101525 1
TRUTH TABLE (X = Don't Care)
S H L L W X H L Operation Not Enabled Read Write Data X X X Output L Q/Q L Current -- IEE IEE
ABSOLUTE MAXIMUM RATINGS (See Note)
Rating VEE Pin Potential (to Ground) Voltage Relative to VCC for Any Pin Except VEE Output Current (per I/O) Power Dissipation Temperature Under Bias Operating Temperature Symbol VEE Vin, Vout Iout PD Tbias TJ Value - 7.0 to + 0.5 VEE - 0.5 to + 0.5 - 50 2.0 - 30 to + 85 0 to + 60 Unit V V mA W C C This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to these high impedance circuits. This BiCMOS memory circuit has been designed to meet the dc and ac specifications shown in the tables, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow of at least 500 linear feet per minute is maintained.
Storage Temperature -- Plastic Tstg - 55 to + 125 C NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 0 V, VEE = - 5.2 V 5%, TJ = 0 to + 60C, Unless Otherwise Noted) DC OPERATING CONDITIONS AND SUPPLY CURRENTS
Parameter Supply Voltage (Operating Voltage Range) Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Low Current Input High Current Chip Select Input Low Current Operating Power Supply Current: tAVAV = 20 ns (All Outputs Open)* Quiescent Power Supply Current: fo = 0 MHz (Outputs Open) Voltage Compensation (VOH) Voltage Compensation (VOL) * Address Increment Symbol VEE VIH VIL VOH VOL IIL IIH IIL(CS) IEE IEEQ VOH/VEE VOL/VEE Min - 5.46 - 1165 - 1810 - 1025 - 1810 - 50 -- 0.5 -- -- Typ - 5.2 -- -- -- -- -- -- -- -- -- Max - 4.94 - 880 - 1475 - 880 - 1620 -- 220 170 - 195 - 150 Unit V mV mV mV mV A A A mA mA
35 mV/V @ - 4.94 to - 5.46 V 60 mV/V @ - 4.94 to - 5.46 V
RISE/FALL TIME CHARACTERISTICS
Parameter Output Rise Time Output Fall Time Symbol tr tf Test Condition 20% to 80% 20% to 80% Min 0.5 0.5 Typ 1.0 1.0 Max 1.5 1.5 Unit ns ns
CAPACITANCE (f = 1.0 MHz, TA = 25C, Periodically Sampled Rather Than 100% Tested)
Parameter Input Capacitance Output Capacitance Address and Data S, W Q, Q Symbol Cin Cck Cout Typ 3.5 4 4 Max 7 7 8 Unit pF pF
MCM101525 2
MOTOROLA FAST SRAM
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VEE = - 5.2 V 5%, VCC = 0 V, TJ = 0 to +60C, Unless Otherwise Noted)
Input Pulse Levels . . . . . . . . . . . . . - 1.7 V to - 0.9 V (See Figure 1) Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 ns Input Timing Measurement Reference Level . . . . . . . . . . . . . . . . 50% Output Timing Measurement Reference Level . . VOH = - 1165 mV VOL = - 1475 mV Output Load (AC Test Circuit) . . . . . . . . . . . . . . . . . . . . . See Figure 2
READ CYCLE TIMING (See Notes 1 and 2)
MCM101525-12 Parameter Read Cycle Time Address Access Time Chip Select Access Time Select High to Output Low Output Hold from Address Change Power Up Time Symbol tAVAV tAVQV tSLQV tSHQL tAXQX tSLIEEH Min 12 -- -- 0 4 0 Max -- 12 12 8 -- -- MCM101525-15 Min 15 -- -- 0 4 0 Max -- 15 15 9 -- -- Unit ns ns ns ns ns ns ns 4 4 6 Notes 2, 3
Power Down Time tSHIEEL -- 12 -- 15 NOTES: 1. W is high for read cycle. 2. Product sensitivites to noise require proper grounding and decoupling of power supplies during read and write cycles. 3. All read cycle timings are referenced from the last valid address to the first transitioning address. 4. This parameter is sampled and not 100% tested. 5. Device is continuously selected (S VIL). 6. Addresses valid prior to or coincident with S going low.
AC TEST CONDITIONS
VCC
- 0.9 V 80% 50% 20% tr tr = Rise Time tf = Fall Time 50% = Timing Reference Levels tf 0.1 F VEE RL = 50 CL = 30 pF 0.01 F 80% 50% 20% Q CL - 1.7 V - 2.0 V RL
Figure 1. Input Levels
Figure 2. AC Test Circuit
MOTOROLA FAST SRAM
MCM101525 3
READ CYCLE 1 (See Notes 1, 2, and 5)
tAVAV A (ADDRESS) tAXQX PREVIOUS DATA VALID Q/Q (DATA OUT) tAVQV DATA VALID
READ CYCLE 2 (See Note 6)
tAVAV A (ADDRESS) tSLQV S (CHIP SELECT) tSHQL
Q/Q (DATA OUT) IEE tSLIEEH
DATA VALID tSHIEEL
SUPPLY CURRENT
MCM101525 4
MOTOROLA FAST SRAM
WRITE CYCLE 1 (W Controlled, See Notes 1 and 2)
MCM101525-12 Parameter Write Cycle Time Address Setup Time Address Valid to End of Write Write Pulse Width Data Valid to End of Write Data Hold Time Write High to Output Active Write High to Output Valid Write Recovery Time Symbol tAVAV tAVWL tAVWH tWLWH, tWLSH tDVWH tWHDX tWHQX tWHQV tWHAX Min 12 1 9 8 8 1 4 -- 1 Max -- -- -- -- -- -- -- 13 -- MCM101525-15 Min 15 1 10 9 9 1 4 -- 1 Max -- -- -- -- -- -- -- 16 -- Unit ns ns ns ns ns ns ns ns ns ns 4 Notes 3
Write Low to Output Low tWLQL 0 8 0 9 NOTES: 1. A write occurs during the overlap of S low and W low. 2. Product sensitivites to noise require proper grounding and decoupling of power supplies during read and write cycles. 3. All write cycle timings are referenced from the last valid address to the first transitioning address. 4. This parameter is sampled and not 100% tested.
WRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3)
tAVAV A (ADDRESS) tAVWH tAVWL S (CHIP SELECT) tWLSH D (DATA IN) DATA VALID tDVWH tWLWH W (WRITE ENABLE) tWHQV tWLQL tWHQX Q/Q (DATA OUT) tWHDX ADDRESS VALID tWHAX
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
MOTOROLA FAST SRAM
MCM101525 5
WRITE CYCLE 2 (S Controlled, See Notes 1 and 2)
MCM101525-12 Parameter Write Cycle Time Address Setup Time Address Valid to End of Write Write Pulse Width Data Valid to End of Write Chip Select Set-Up Time Data Hold Time (S) (W) Symbol tAVAV tAVSL tAVSH tSLSH tSLWH tDVSH tSLWL tSHDX Min 12 1 9 8 8 0 1 Max -- -- -- -- -- -- -- MCM101525-15 Min 15 1 10 9 9 0 1 Max -- -- -- -- -- -- -- Unit ns ns ns ns ns ns ns ns Notes 3
Write Recovery Time tSHAX 1 -- 1 -- NOTES: 1. A write occurs during the overlap of S low and W low. 2. Product sensitivites to noise require proper grounding and decoupling of power supplies during read and write cycles. 3. All write cycle timings are referenced from the last valid address to the first transitioning address.
WRITE CYCLE 2 (S Controlled, See Notes 1 and 2)
tAVAV tAVSH A (ADDRESS) tAVSL S (CHIP SELECT) tDVSH D (DATA IN) tSLWL tSLWH W (WRITE ENABLE) DATA VALID tSHDX tSHAX tSLSH
Q/Q (DATA OUT)
ORDERING INFORMATION
(Order by Full Part Number) MCM
Motorola Memory Prefix Part Number
101525
XX
XX
XX
Shipping Method (Blank = Rails) Speed (12 = 12 ns, 15 = 15 ns) Package (TB = TAB)
Full Part Numbers -- MCM101525TB12 MCM101525TB15
MCM101525 6
MOTOROLA FAST SRAM
PACKAGE DIMENSIONS
TB PACKAGE 400 MIL TAB CASE 984A-01 S U U1 P Z
CARRIER
1
36
S1
TAB TAPE
VW AD J K
19
18
TAB TAPE
REF 3X
R
VIEW AM Y
CARRIER
RETAINER
-TSECTION AN-AN
4X
1.40 (0.055)
S
0.05 (0.002) -N-
T M-N
S
H
S
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER.
-MDIM A B C C1 J K P R S S1 U U1 V W Y Z AA AB AC AD AE AF AG AH AJ AK AL AR AS AT AU AV AV1
AN
AN
C
A
-H-
C1 VIEW AM
TAPE CARRIER RETAINER ELIMINATED FROM VIEW FOR CLARITY
MILLIMETERS MIN MAX 18.14 REF 8.03 REF 26.95 BSC 26.95 BSC --- 0.25 --- 0.71 3.00 REF 2.39 REF 50.00 REF 50.00 REF 6.00 REF 6.00 REF 39.40 REF 45.68 REF 38.00 REF 1.15 1.25 16.21 16.31 11.20 11.30 8.99 9.09 0.15 0.21 0.762 BSC 0.18 0.28 21.31 21.24 35.00 REF 25.40 REF 26.95 BSC 34.98 REF 0.65 0.75 0.50 BSC 0.60 0.70 26.95 REF 25.35 25.45 25.35 25.45
INCHES MIN MAX 0.714 REF 0.316 REF 1.061 BSC 1.061 BSC --- 0.010 --- 0.028 0.118 REF 0.094 REF 1.969 REF 1.969 REF 0.236 REF 0.236 REF 1.551 REF 1.798 REF 1.496 REF 0.045 0.049 0.638 0.642 0.441 0.445 0.354 0.358 0.006 0.008 0.030 BSC 0.007 0.011 0.832 0.836 1.378 REF 1.000 REF 1.061 BSC 1.377 REF 0.026 0.030 0.020 BSC 0.024 0.028 1.061 REF 0.998 1.002 0.998 1.002
MOTOROLA FAST SRAM
MCM101525 7
TB PACKAGE 400 MIL TAB CASE 984A-01 (cont.) AA AB AC
0.25 (0.010)
S
T M-N
S
H
S
4X
AE/2
AL
AK
AJ
34X
AE
VIEW AP AH AG 0.05 (0.0020)
36X S S
T M-N
S
H
S
AF 0.25 (0.010)
S
T M-N
S
H
AU AV
REF 4X
196X
AR
S
2.00 (0.78)
0.10 (0.004)
L
T M-N
S
H
194X
AS
AT 0.10 (0.004)
L
T M-N
S
H
S
REF
AS
VIEW AP AV1
BOTTOM VIEW
Literature Distribution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
MCM101525 8
CODELINE TO BE PLACED HERE
*MCM101525/D*
MCM101525/D MOTOROLA FAST SRAM

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